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Journal of information and communication convergence engineering 2024; 22(1): 14-22

Published online March 31, 2024

https://doi.org/10.56977/jicce.2024.22.1.14

© Korea Institute of Information and Communication Engineering

Wide-Bandwidth Wilkinson Power Divider for Three-Way Output Ports Integrated with Defected Ground Structure

Sreyrong Chhit 1, Jae Bok Lee 2, Dal Ahn 3, and Youna Jang1*

1Department of ICT Convergence, Soonchunhyang University, Asan 31538, Republic of Korea
2Department of Electrical Communication System Engineering, Soonchunhyang University, Asan 31538, Republic of Korea
3Department of Electrical Engineering, Soonchunhyang University, Asan 31538, Republic of Korea

Correspondence to : Youna Jang (E-mail: jynhlu73@sch.ac.kr)
Department of ICT Convergence, Soonchunhyang University, Asan 31538, Republic of Korea

Received: September 13, 2023; Revised: November 20, 2023; Accepted: December 11, 2023

This is an Open Access article distributed under the terms of the Creative Commons Attribution Non-Commercial License (http://creativecommons.org/licenses/by-nc/3.0/) which permits unrestricted non-commercial use, distribution, and reproduction in any medium, provided the original work is properly cited.

This study presents the design of a Wilkinson power divider for three-way output ports (WPD3OP), which incorporates a defected ground structure (DGS). An asymmetric power divider is integrated into the output ports of the conventional Wilkinson power divider (WPD), establishing a three-way output port configuration. The DGS introduces periodic or irregular patterns into the ground plane to suppress unwanted electromagnetic wave propagation, and its incorporation can enhance the performance of the power divider, in terms of the power-division ratio, isolation, and bandwidth, by reducing spurious resonances. The proposed design algorithm for an asymmetric power divider for three-way output ports is analyzed via circuit simulations using High-Frequency Simulation Software (HFSS). The results verify the validity of the proposed method. The analysis of the WPD3OP integrated with DGS certifies the achievement of a center frequency of 2 GHz. This confirmation is supported by schematic ideal design simulation results and measurements encompassing insertion losses, return losses, and isolation.

Keywords WPD 3-way output ports, Defected Ground Structure (DGS), Power division ratio, Isolation, Bandwidth

The conventional Wilkinson power divider (WPD) operates as a lossy three-port network capable of absorbing and balancing all ports while maintaining isolation between the output ports. It is a widely used passive radio-frequency (RF) component that divides a single input signal into two equal output signals, achieving power division between the output ports. The WPD consists of four quarter-wavelength transmission-line sections and two parallel resistors. The quarter-wavelength sections ensure equal power division between the output ports, whereas the resistors provide isolation. The conventional WPD typically performs impedance matching of Z1, which is achieved using an electrical length of λ/4, and incorporates an isolation resistor R1 between port2 and port3 [1,2].

Based on the requirements of a WPD for three-way output ports (WPD3OP), the algorithm for the impedance formula is chosen after choosing the impedance Z1. The impedance of the unequal or asymmetric WPD is determined based on a power ratio of 2:1, considering the characteristic impedance Z0 at the final output terminations of all ports [3,4]. Recently, the integration of defected ground structure (DGS), which is selected based on the desired performance objectives, has gained attention as a technique to improve the performance of the RF and microwave components [5,6]. DGS is used in RF and microwave circuit designs to manipulate the propagation characteristics of electromagnetic waves. It involves introducing specific patterns or structures into the ground plane of a circuit to achieve desired effects such as frequency filtering, improved signal integrity, reduced crosstalk, and enhanced isolation. The DGS can be regarded as an equivalent-circuit representation of a physical structure, providing a simplified model for analysis and design [7-9].

This study presents the design of a WPD3OP, incorporating a DGS, as indicated in Fig. 1. The objective is to improve the performance in terms of the power-division ratio, return losses, and isolation between output ports. The design process involves determining the operating frequency, designing the WPD, selecting a specific DGS design, and optimizing its dimensions and placement using electromagnetic simulations [10,11].

Fig. 1. Proposed design of the Wilkinson power divider for three-way output ports, integrated with a DGS. The substrate εr = 0.762 mm and thickness = 0.035 mm.

The proposed design offers potential benefits in terms of function, wherein precise power division and high isolation between output ports are required. By exploiting the advantages of both the WPD3OP and the DGS, this design aims to provide an improved solution for RF and microwave systems. The electromagnetic (EM) simulation software ANSYS HFSS is used to optimize the DGS dimensions and placement, ensuring the desired performance improvements. The subsequent sections of this paper discuss the design methodology, including the design equations, simulation techniques, fabrication considerations, and testing procedures. The designed WPD3OP integrated with a DGS is fabricated using standard printed circuit board (PCB) techniques. Subsequently, the performance of the power divider is tested. The testing process involves measuring the power-division ratio, isolation between output ports, and other relevant parameters. The results are presented and discussed to evaluate the performance of the designed WPD3OP, with a DGS.

The WPD3OP employs an electrical length of λ/4 and ensures that the characteristic impedance of output ports 2, 3, and 4 matches Z0, as depicted in Fig. 2. The ideal design of the Wilkinson power divider for three-way output ports integrated with a DGS was a perfect model for fabrication and measurement to achieve preferable results. Moreover, a DGS structure is incorporated into the WPD3OP to achieve better power transmission and insertion losses and wider isolation bandwidth.

Fig. 2. Schematic of the designed Wilkinson power divider for three-way output ports.

A. Analysis of Input Impedance Part I

The designed WPD3OP can be divided into two parts for analysis. Part I encompasses the even and odd modes of output ports 2 and 3, as illustrated in Fig. 3(a) and (b), respectively. Part II consists of the even and odd modes of output ports 3 and 4, as depicted in Fig. 3(c) and (d), respectively. Part I, uses a transmission line of electrical length λ/4 with input impedance Zin2 and Zin3. Additionally, the asymmetric power-divider ratio is K2=P2P3=2, as indicated in Eq. (1).

Fig. 3. Schematic bisections of the Wilkinson power divider for three-way output ports: a) even-mode analysis of Part I, b) odd-mode analysis of Part I, c) evenmode analysis of Part II, d) odd-mode analysis of Part II.

Zin2=Z2Z0 /K+jZ2tanθZ2+jZ0 /Ktanθ=Z22Z0/K

Using the equation Zin2=Z021+1K2, we obtain

Z2=Z021+K2K3

Then, we define as the input impedance of port 3.

Zin3=Z3Z0 /K+jZ3tanθZ3+jZ0 /Ktanθ=Z32Z0/K

Using Zin3=Z021+K2, we obtain

Z3=Z0K21+K2

B. Analysis of Input Impedance Part II

In this case, to analyze the input impedance of Part II in

Fig. 3(c) and (d), we must consider the excitation of both the even and odd modes. The input impedances of ports 3 and 4,

denoted Zin4 and Zin5, can be obtained as

Zin4=Z4Z0 /K+jZ4tanθZ4+jZ0 /Ktanθ=Z42Z0/K

Using the equation Zin4=Z021+K2, we obtain

Z4=Z0K21+K2

Then, we define Zin5 as the input impedance of port 5.

Zin5=Z5Z0 /K+jZ5tanθZ5+jZ0 /Ktanθ=Z52Z0/K

Using Zin5=Z021+1K2, we obtain

Z5=Z021+K2K3

We can obtain the value of the resistor isolation from the characteristics of all output ports as

R2=R3=Z0+2Z0

C. Analysis of Defected Ground Structure (DGS)

The equivalent-circuit model of a DGS typically consists of lumped elements that approximate the behavior of the physical structure. The specific parameters and their values depend on the characteristics and objectives of the DGS design. The parameters of these equivalent-circuit elements such as a resistor, inductor, and capacitor (RLC) are interdependent, according to the physical layout and properties of the DGS structure, as illustrated in Fig. 4. The equivalent RLC value can be determined using the dimensional geometry of the DGS. The values of the elements are determined based on empirical measurements, electromagnetic (EM) simulations, or analytical approximations. The equivalentcircuit model of DGS provides a convenient framework for circuit analysis and simulation. It enables designers to predict and optimize the performance of DGS-integrated circuits, thereby aiding a design that reduces the need for extensive EM-simulations or prototyping.

Fig. 4. Excitation of the equivalent circuit of the DGS section.

The DGS properties include the resistance, inductance, and capacitance. It can model the electric-field coupling as well as inductive and resistive losses. Some common equivalent-circuit elements that constitute the DGS, presented in Fig. 4 [12,13].

C=ωC2Z0ω02ωC2
L=12π2f02C
RDGS=2Z01S21 S21

Here, ω0=2πf0 is center resonance frequency and ωC=2πf0 is the cutoff resonance frequency.

A. Design Process

To verify the structure of the WPD3OP with integrated DGS and the design parameters in the experiment, the characteristic impedances of the output ports must match Z0. The calculated impedance values of the transmission line are Z0 = 50 Ω and Z1 = 70.71 Ω with R1 = 100 Ω for the conventional WPD. The asymmetrical impedances of the transmission lines, from (2) and (8) are Z2 = Z5 = 61.24 Ω and Z3 = Z4 = 122. 47 Ω, from equations (4) and (6). During isolation, the resistor values are determined as R2 = R3 = 150 Ω as indicated in equation (9). All transmission lines have an electrical length of λ/4 and a frequency response 2 GHz with the employed design, as presented in Tables 1 and 2.

Table 1 . Characteristics of material employed in the design

SubstrateThicknessεrDielectric loss
Taconic0.762 mm2.970.0012


Table 2 . Calculation of the parameters of the Wilkinson power divider for three-way output ports without defected ground structure

Impedance Z (Ω)Electrical Length (θ)Physical Length (mm)Physical Width (mm)
Z0 = 5045°L50 = 12.13W50 = 1.88
Z1 = 70.7190°L1 = 24.83W1 = 1.03
Z2 = 61.2490°L2 = 24.58W2 = 1.34
Z3 = 122.4790°L3 = 25.82W3 = 0.26
Z4 = 122.4790°L4 = 25.82W4 = 0.26
Z5 = 61.2490°L5 = 24.58W5 = 1.34


The dimensions of the DGS are as follows: a = 2. 6 mm, b = 5 mm, gl = 1 mm, and g = 0.5 mm, as indicated in Fig. 5(a) and (b). The simulation results of the DGS design for the insertion loss S21 and return loss S11, are illustrated in Fig. 5(c). These dimensions correspond to the square lattice dimensions of the DGS, presenting the properties of an RLC circuit. The equivalent circuit parameters of the DGS are as follows: RDGS = 8740.971692 Ω, L = 0.167853 nH, and C = 1.381903 pF, derived from equations (10), (11), and (12), respectively.

Fig. 5. Design of the defected ground structure (DGS) section with impedances of Z3 and Z4: a) top view, b) bottom view, and c) the comparison results of simulated DGS dimensions and equivalent-circuit RLC.

Fig. 5(c) presents a comparison between the square lattice dimensions of the DGS and simulation results of the equivalent-circuit RLC model, which are almost similar in shape. These dimensions effectively enhance the bandwidth of the WPD3OP.

In the design process, step-by-step algorithms for the proposed WPD design and integration with DGS for a threeway output port are illustrated through the flowchart in Fig. 6. This approach allows the assessment and approximation of the effects of variable changes in different parameters, thereby facilitating the tuning of the circuit to achieve the desired outcome. Although the circuit design steps may appear intricate and rigorous, they offer a straightforward and understandable method for attaining satisfactory results.

Fig. 6. Flow of the proposed design.

B. Simulation and Optimization

In the EM-simulation results, the WPD3OP shows return losses of S11, S22, S33, and S44 with insertion losses of S21, S31, and S41, and isolations of S23, S43, and S24. The f requency-response performance at 2 GHz, along with the results for different S-parameters, is illustrated in Fig. 7(a). Based on the simulation findings, the insertion losses across the different output ports are approximately S21 = −4.93 dB, S31 = −4.50 dB, and S41 = −5.22 dB, as indicated in Fig. 7(a). During the return loss at all ports S11 and S33 are below −30 dB and S22 and S44 below −20 dB, which is a good result. Furthermore, the improved attenuation of isolation between output port 2 to output port 4 and output port 3 to output port 2 matches that of output port 3 and output port 4, as determined by the values of S23 and ,S43 which are below −30 dB, and S24, which is below −25 dB, as shown in Fig. 7(a). Overall, the EM simulation results of the WPD3OP respond well at a center frequency of 2 GHz. In the proposed method, a WPD3OP is inserted the defected ground structure (DGS). These physical DGS with the improved wide bandwidth of the simulation results as isolation transmit power better to each output port of insertion loss, as shown in Fig. 7(b). The EM simulation results of the WPD3OP integrated with DGS showed a low insertion loss and better bandwidth of isolation between output ports.

Fig. 7. EM simulation results: a) Wilkinson power divider (WPD) for three-way output ports, b) the proposed WPD for three-way output ports integrated with defected ground structure.

First, we present the measurement results of the WPD with an integrated DGS and three-way output ports, as shown in Fig. 8(a) and (b). The material chosen for the experiments is presented in Table 1. The characteristic impedance Z1 = 70.71 Ω, Z2 = Z5 = 61. 24 Ω, Z3 = Z4 = 122.47 Ω and the electrical length of each transmission line is seated at λ/4, with an operating frequency specified at 2 GHz. The values of the characteristic impedance, electrical wavelength, and operating frequency are crucial for determining the length and width required for the construction and specification of the physical properties for the fabrication of the WPD3OP, as illustrated in Fig. 8(a) and detailed in Table 2. In addition, a DGS with dimensions a = 2.6 mm, b = 5 mm, gl = 1 mm, and g = 0.5 mm, as presented in Fig. 5(b), can be constructed for the fabrication of the WPD3OP integrated with DGS, as illustrated in Fig. 8(a) and (b). The fabrication dimensions are 53 mm × 32 mm. The experiment results regarding frequency responses and impedance are obtained from the values of the S-parameters, as depicted in Fig. 8(c) and (d). The frequency responses are in good agreement with the theoretical values.

Fig. 8. Experiment results of the Wilkinson power divider for three-way output ports (WPD3OP) without defected ground structure (DGS) and with DGS: a) Fabrication of the top, b) fabrication of the bottom, c) result of the WPD3OP, d) proposed result of WPD3OP integrated with DGS.

In this experiment, a comparison was made between the WPD3OP integrated with a DGS and one without a DGS. The results of a WPD3OP, presented in Fig 8(c), shows that the power output insertion losses for all ports, S21 = −4.68 dB, S31 = −4.53 dB, and S41 = −5.21 dB. The return loss values are S11 = −29.98 dB, dB, and S33 = −32.33 dB. Moreover, the isolation values are S23 = −33.41 dB, S43 = −33.51 dB, and S24 = −28.95 dB. In terms of the performance of the proposed WPD3OP integrated with DGS, the insertion losses at all output ports are better than that of the WPD3OP: S21 = −4.95 dB, S31 = −4.89 dB, and S41 = −4.98 dB. The return losses are S11 = −28.47 dB, dB, and S33 = −29.80 dB. The isolation between the output ports, S23 = −45.97 dB, S43 = −39.60 dB, and S24 = −28.68 dB, as illustrated in Fig. 8(d). There is a good agreement between the measurement results of the WPD3OP integrated DGS and the result from the EM simulation, demonstrating a significant improvement in the power output to each port. Moreover, the insertion losses of the output ports, S11 = 1. 21 GHz, = 2.06 GHz, and S33 = 0. 83 GHz; and the isolation for ports, S23 = 1. 29 GHz, S43 = 1. 32 GHz, and S24 = 1.2 GHz; provide improved bandwidth, as presented in Table 3.

Table 3 . Comparison of designs of Wilkinson power divider for three-way output ports without defected ground structure (DGS) and with DGS

Wilkinson power divider for three-way output portsWilkinson power divider for three-way output ports integrated with DGS
Return loss [dB]S11S22, S44S33Magnitude [dB]Return loss [dB]S11S22, S44S33Magnitude [dB]
-29.98-23.32-32.33-28.47-24.09-29.80
Insertion loss [dB]S21S31S43Insertion loss [dB]S21S31S43
-4.68-4.53-5.21-4.95-4.89-4.98
Isolation [dB]S23S43S24Isolation [dB]S23S43S24
-33.41-33.51-28.95-45.97-39.60-28.68
Return loss [-20dB]S11S22, S44S33Bandwidth [GHz]Return loss [-20dB]S11S22, S44S33Bandwidth [GHz]
0.971.970.811.212.060.83
Isolation [-20dB]S23S43S24Isolation [-20dB]S23S43S24
1.101.131.181.291.321.2

The three-way WPD divides an input signal into two asymmetric output signals at a specified power ratio, thereby providing three output ports. Its performance includes various parameters such as insertion loss, return loss, isolation, and output power characteristics. When considering the frequency response, the WPD3OP exhibits improved return losses S11, S22, S33, and S44, and better isolation of S23, S43, and S24 compared to the other configurations. However, it is noteworthy that the insertion losses S21 = S31 = S41 and output power characteristics remain consistent across the different power divider models.

In this work, an integrated DGS was incorporated into the WPD3OP, and the outcome was impressive. The bandwidth was greater than that in the previous design, particularly in isolation for S23, S43, and S24. Meanwhile, the results of the insertion loss, S21 = S31 = S41 showed better power output at each port. These characteristics indicated that a welldesigned power-divider circuit could be highly effective in practical applications. With improved return loss, superior isolation, consistent insertion loss, and reliable output power characteristics, this three-way WPD demonstrated its suitability for various scenarios in which precise and efficient signal splitting is crucial. In addition, the circuit simulation verified using the measurement results indicated that the proposed design of the WPD3OP integrated with a DGS considered the improved magnitude and wide bandwidth of isolation between output ports S23, S43, and S24, which crucially reduced the interference. Enhanced isolation prevented unwanted interference between the output ports, ensuring that signals at one port did not adversely affect or distort the signals at other ports. This was particularly important in RF and microwave systems, which multiple signals coexisted. This ensured that each output port receives an equal or predetermined power level from the original signal.

This work was supported by the Technology Innovation Program (20016657, 5G RF Component For Global Communication Service Provider) funded by the Ministry of Trade, Industry & Energy (MOTIE, Republic of Korea), the Ministry of Science and ICT (MSIT), Republic of Korea, under the ICT Challenge and Advanced Network of HRD (ICAN) program (IITP-2024-2020-0-01832) supervised by the Institute of Information & Communications Technology Planning & Evaluation (IITP) the and Soonchunhyang University Research Fund.

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Sreyrong Chhit

was born in Kom Pong Speu, Cambodia, in 1997. She received her B.S. degree in Telecommunication and Electronic Engineering from the Royal University of Phnom Penh, Cambodia, in 2021. Currently, she is pursuing her M.S. in the Department of ICT Convergence at Soonchunhyang University, Asan, Republic of Korea. She is also a research student at the RF and Microwave Component Research Center (RAMREC), Soonchunhyang University. Her research interests include symmetric and asymmetric power dividers, for multiple output ports.


Jae Bok Lee

received his B.S. degree in Genetic Engineering from the Suncheon University, Suncheon, Republic of Korea. and M.S. degree in Electronics Engineering from the Soonchunhyang University, Asan, Republic of Korea, in 2022. He is currently in Ph.D candidate in Electrical Communication and System Engineering in Soonchunhyang University, since 2023. He received the Presidential Recognition Award for developing innovative technologies in small and medium enterprises and established ERANGTEK Co., Ltd in 2017 with an “Eco-Friendly Multiplexer,” which is an applied common-pole coupling method and the “Green-IT Single RAN” technology based on “high-frequency, low-loss, low-noise” technology, which can perfectly eliminate the frequency interference between mobile carriers. In addition, he received the Jang Young-sil (IR52) Award in 2022, from the Ministry of Science and ICT, and the Presidential Dragon Award from the Ministry of Public Administration and Security.


Dal Ahn

received his B.S., M.S., and Ph.D. degrees from the Sogang University, Seoul, Republic of Korea, in 1984, 1986, and 1990, respectively, all in Electronics Engineering. From 1990 to 1992, he was with the Mobile Communications Division, Electronics and Telecommunications Research Institute (ETRI), Daejeon, Republic of Korea. Since 1992, he has been with the School of Electrical and Electronic Engineering, Soonchunhyang University, Asan, Chungnam, Republic of Korea, where he is currently a Professor. He is also currently the Chief of the RF and Microwave Component Research Center (RAMREC), Soonchunhyang University. He is also a Technical Consultant for Tel Wave Inc., Suwon, Republic of Korea. His current research interests include the design and application of passive and active components at radio and microwave frequencies, design of the RF front-end module for various handset systems using low-temperature co-fired ceramic (LTCC) technology, DGS circuit applications, and circuit modeling using a commercial EM analysis program. He is an Editor of the Journal of Korea Electromagnetic Engineering Society. Prof. Ahn is a senior member of the Korea Electromagnetic Engineering Society (KEES).


Youna Jang

received her Master’s degree in Electronics and computer engineering from Hanyang University, Seoul, Republic of Korea in 2014. She received her Ph.D. in Electrical Communication System Engineering from the Soonchunhyang University, Choongnam, Republic of Korea in 2019. She participated as a designer of duplexer filter in an internship program in 2015 at Qorvo, Bundang, Republic of Korea. She was a lecturer at Soonchunhyang University from 2016 to 2020. She is currently a research professor with the Radio and Mechatronics Research Center. Her research areas include the design of passive components in the microwave band.


Article

Regular paper

Journal of information and communication convergence engineering 2024; 22(1): 14-22

Published online March 31, 2024 https://doi.org/10.56977/jicce.2024.22.1.14

Copyright © Korea Institute of Information and Communication Engineering.

Wide-Bandwidth Wilkinson Power Divider for Three-Way Output Ports Integrated with Defected Ground Structure

Sreyrong Chhit 1, Jae Bok Lee 2, Dal Ahn 3, and Youna Jang1*

1Department of ICT Convergence, Soonchunhyang University, Asan 31538, Republic of Korea
2Department of Electrical Communication System Engineering, Soonchunhyang University, Asan 31538, Republic of Korea
3Department of Electrical Engineering, Soonchunhyang University, Asan 31538, Republic of Korea

Correspondence to:Youna Jang (E-mail: jynhlu73@sch.ac.kr)
Department of ICT Convergence, Soonchunhyang University, Asan 31538, Republic of Korea

Received: September 13, 2023; Revised: November 20, 2023; Accepted: December 11, 2023

This is an Open Access article distributed under the terms of the Creative Commons Attribution Non-Commercial License (http://creativecommons.org/licenses/by-nc/3.0/) which permits unrestricted non-commercial use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

This study presents the design of a Wilkinson power divider for three-way output ports (WPD3OP), which incorporates a defected ground structure (DGS). An asymmetric power divider is integrated into the output ports of the conventional Wilkinson power divider (WPD), establishing a three-way output port configuration. The DGS introduces periodic or irregular patterns into the ground plane to suppress unwanted electromagnetic wave propagation, and its incorporation can enhance the performance of the power divider, in terms of the power-division ratio, isolation, and bandwidth, by reducing spurious resonances. The proposed design algorithm for an asymmetric power divider for three-way output ports is analyzed via circuit simulations using High-Frequency Simulation Software (HFSS). The results verify the validity of the proposed method. The analysis of the WPD3OP integrated with DGS certifies the achievement of a center frequency of 2 GHz. This confirmation is supported by schematic ideal design simulation results and measurements encompassing insertion losses, return losses, and isolation.

Keywords: WPD 3-way output ports, Defected Ground Structure (DGS), Power division ratio, Isolation, Bandwidth

I. INTRODUCTION

The conventional Wilkinson power divider (WPD) operates as a lossy three-port network capable of absorbing and balancing all ports while maintaining isolation between the output ports. It is a widely used passive radio-frequency (RF) component that divides a single input signal into two equal output signals, achieving power division between the output ports. The WPD consists of four quarter-wavelength transmission-line sections and two parallel resistors. The quarter-wavelength sections ensure equal power division between the output ports, whereas the resistors provide isolation. The conventional WPD typically performs impedance matching of Z1, which is achieved using an electrical length of λ/4, and incorporates an isolation resistor R1 between port2 and port3 [1,2].

Based on the requirements of a WPD for three-way output ports (WPD3OP), the algorithm for the impedance formula is chosen after choosing the impedance Z1. The impedance of the unequal or asymmetric WPD is determined based on a power ratio of 2:1, considering the characteristic impedance Z0 at the final output terminations of all ports [3,4]. Recently, the integration of defected ground structure (DGS), which is selected based on the desired performance objectives, has gained attention as a technique to improve the performance of the RF and microwave components [5,6]. DGS is used in RF and microwave circuit designs to manipulate the propagation characteristics of electromagnetic waves. It involves introducing specific patterns or structures into the ground plane of a circuit to achieve desired effects such as frequency filtering, improved signal integrity, reduced crosstalk, and enhanced isolation. The DGS can be regarded as an equivalent-circuit representation of a physical structure, providing a simplified model for analysis and design [7-9].

This study presents the design of a WPD3OP, incorporating a DGS, as indicated in Fig. 1. The objective is to improve the performance in terms of the power-division ratio, return losses, and isolation between output ports. The design process involves determining the operating frequency, designing the WPD, selecting a specific DGS design, and optimizing its dimensions and placement using electromagnetic simulations [10,11].

Figure 1. Proposed design of the Wilkinson power divider for three-way output ports, integrated with a DGS. The substrate εr = 0.762 mm and thickness = 0.035 mm.

The proposed design offers potential benefits in terms of function, wherein precise power division and high isolation between output ports are required. By exploiting the advantages of both the WPD3OP and the DGS, this design aims to provide an improved solution for RF and microwave systems. The electromagnetic (EM) simulation software ANSYS HFSS is used to optimize the DGS dimensions and placement, ensuring the desired performance improvements. The subsequent sections of this paper discuss the design methodology, including the design equations, simulation techniques, fabrication considerations, and testing procedures. The designed WPD3OP integrated with a DGS is fabricated using standard printed circuit board (PCB) techniques. Subsequently, the performance of the power divider is tested. The testing process involves measuring the power-division ratio, isolation between output ports, and other relevant parameters. The results are presented and discussed to evaluate the performance of the designed WPD3OP, with a DGS.

II. DESIGN THEORY

The WPD3OP employs an electrical length of λ/4 and ensures that the characteristic impedance of output ports 2, 3, and 4 matches Z0, as depicted in Fig. 2. The ideal design of the Wilkinson power divider for three-way output ports integrated with a DGS was a perfect model for fabrication and measurement to achieve preferable results. Moreover, a DGS structure is incorporated into the WPD3OP to achieve better power transmission and insertion losses and wider isolation bandwidth.

Figure 2. Schematic of the designed Wilkinson power divider for three-way output ports.

A. Analysis of Input Impedance Part I

The designed WPD3OP can be divided into two parts for analysis. Part I encompasses the even and odd modes of output ports 2 and 3, as illustrated in Fig. 3(a) and (b), respectively. Part II consists of the even and odd modes of output ports 3 and 4, as depicted in Fig. 3(c) and (d), respectively. Part I, uses a transmission line of electrical length λ/4 with input impedance Zin2 and Zin3. Additionally, the asymmetric power-divider ratio is K2=P2P3=2, as indicated in Eq. (1).

Figure 3. Schematic bisections of the Wilkinson power divider for three-way output ports: a) even-mode analysis of Part I, b) odd-mode analysis of Part I, c) evenmode analysis of Part II, d) odd-mode analysis of Part II.

Zin2=Z2Z0 /K+jZ2tanθZ2+jZ0 /Ktanθ=Z22Z0/K

Using the equation Zin2=Z021+1K2, we obtain

Z2=Z021+K2K3

Then, we define as the input impedance of port 3.

Zin3=Z3Z0 /K+jZ3tanθZ3+jZ0 /Ktanθ=Z32Z0/K

Using Zin3=Z021+K2, we obtain

Z3=Z0K21+K2

B. Analysis of Input Impedance Part II

In this case, to analyze the input impedance of Part II in

Fig. 3(c) and (d), we must consider the excitation of both the even and odd modes. The input impedances of ports 3 and 4,

denoted Zin4 and Zin5, can be obtained as

Zin4=Z4Z0 /K+jZ4tanθZ4+jZ0 /Ktanθ=Z42Z0/K

Using the equation Zin4=Z021+K2, we obtain

Z4=Z0K21+K2

Then, we define Zin5 as the input impedance of port 5.

Zin5=Z5Z0 /K+jZ5tanθZ5+jZ0 /Ktanθ=Z52Z0/K

Using Zin5=Z021+1K2, we obtain

Z5=Z021+K2K3

We can obtain the value of the resistor isolation from the characteristics of all output ports as

R2=R3=Z0+2Z0

C. Analysis of Defected Ground Structure (DGS)

The equivalent-circuit model of a DGS typically consists of lumped elements that approximate the behavior of the physical structure. The specific parameters and their values depend on the characteristics and objectives of the DGS design. The parameters of these equivalent-circuit elements such as a resistor, inductor, and capacitor (RLC) are interdependent, according to the physical layout and properties of the DGS structure, as illustrated in Fig. 4. The equivalent RLC value can be determined using the dimensional geometry of the DGS. The values of the elements are determined based on empirical measurements, electromagnetic (EM) simulations, or analytical approximations. The equivalentcircuit model of DGS provides a convenient framework for circuit analysis and simulation. It enables designers to predict and optimize the performance of DGS-integrated circuits, thereby aiding a design that reduces the need for extensive EM-simulations or prototyping.

Figure 4. Excitation of the equivalent circuit of the DGS section.

The DGS properties include the resistance, inductance, and capacitance. It can model the electric-field coupling as well as inductive and resistive losses. Some common equivalent-circuit elements that constitute the DGS, presented in Fig. 4 [12,13].

C=ωC2Z0ω02ωC2
L=12π2f02C
RDGS=2Z01S21 S21

Here, ω0=2πf0 is center resonance frequency and ωC=2πf0 is the cutoff resonance frequency.

III. DESIGN FLOW AND SIMULATION

A. Design Process

To verify the structure of the WPD3OP with integrated DGS and the design parameters in the experiment, the characteristic impedances of the output ports must match Z0. The calculated impedance values of the transmission line are Z0 = 50 Ω and Z1 = 70.71 Ω with R1 = 100 Ω for the conventional WPD. The asymmetrical impedances of the transmission lines, from (2) and (8) are Z2 = Z5 = 61.24 Ω and Z3 = Z4 = 122. 47 Ω, from equations (4) and (6). During isolation, the resistor values are determined as R2 = R3 = 150 Ω as indicated in equation (9). All transmission lines have an electrical length of λ/4 and a frequency response 2 GHz with the employed design, as presented in Tables 1 and 2.

Table 1 . Characteristics of material employed in the design.

SubstrateThicknessεrDielectric loss
Taconic0.762 mm2.970.0012


Table 2 . Calculation of the parameters of the Wilkinson power divider for three-way output ports without defected ground structure.

Impedance Z (Ω)Electrical Length (θ)Physical Length (mm)Physical Width (mm)
Z0 = 5045°L50 = 12.13W50 = 1.88
Z1 = 70.7190°L1 = 24.83W1 = 1.03
Z2 = 61.2490°L2 = 24.58W2 = 1.34
Z3 = 122.4790°L3 = 25.82W3 = 0.26
Z4 = 122.4790°L4 = 25.82W4 = 0.26
Z5 = 61.2490°L5 = 24.58W5 = 1.34


The dimensions of the DGS are as follows: a = 2. 6 mm, b = 5 mm, gl = 1 mm, and g = 0.5 mm, as indicated in Fig. 5(a) and (b). The simulation results of the DGS design for the insertion loss S21 and return loss S11, are illustrated in Fig. 5(c). These dimensions correspond to the square lattice dimensions of the DGS, presenting the properties of an RLC circuit. The equivalent circuit parameters of the DGS are as follows: RDGS = 8740.971692 Ω, L = 0.167853 nH, and C = 1.381903 pF, derived from equations (10), (11), and (12), respectively.

Figure 5. Design of the defected ground structure (DGS) section with impedances of Z3 and Z4: a) top view, b) bottom view, and c) the comparison results of simulated DGS dimensions and equivalent-circuit RLC.

Fig. 5(c) presents a comparison between the square lattice dimensions of the DGS and simulation results of the equivalent-circuit RLC model, which are almost similar in shape. These dimensions effectively enhance the bandwidth of the WPD3OP.

In the design process, step-by-step algorithms for the proposed WPD design and integration with DGS for a threeway output port are illustrated through the flowchart in Fig. 6. This approach allows the assessment and approximation of the effects of variable changes in different parameters, thereby facilitating the tuning of the circuit to achieve the desired outcome. Although the circuit design steps may appear intricate and rigorous, they offer a straightforward and understandable method for attaining satisfactory results.

Figure 6. Flow of the proposed design.

B. Simulation and Optimization

In the EM-simulation results, the WPD3OP shows return losses of S11, S22, S33, and S44 with insertion losses of S21, S31, and S41, and isolations of S23, S43, and S24. The f requency-response performance at 2 GHz, along with the results for different S-parameters, is illustrated in Fig. 7(a). Based on the simulation findings, the insertion losses across the different output ports are approximately S21 = −4.93 dB, S31 = −4.50 dB, and S41 = −5.22 dB, as indicated in Fig. 7(a). During the return loss at all ports S11 and S33 are below −30 dB and S22 and S44 below −20 dB, which is a good result. Furthermore, the improved attenuation of isolation between output port 2 to output port 4 and output port 3 to output port 2 matches that of output port 3 and output port 4, as determined by the values of S23 and ,S43 which are below −30 dB, and S24, which is below −25 dB, as shown in Fig. 7(a). Overall, the EM simulation results of the WPD3OP respond well at a center frequency of 2 GHz. In the proposed method, a WPD3OP is inserted the defected ground structure (DGS). These physical DGS with the improved wide bandwidth of the simulation results as isolation transmit power better to each output port of insertion loss, as shown in Fig. 7(b). The EM simulation results of the WPD3OP integrated with DGS showed a low insertion loss and better bandwidth of isolation between output ports.

Figure 7. EM simulation results: a) Wilkinson power divider (WPD) for three-way output ports, b) the proposed WPD for three-way output ports integrated with defected ground structure.

IV. RESULTS AND DISCUSSION

First, we present the measurement results of the WPD with an integrated DGS and three-way output ports, as shown in Fig. 8(a) and (b). The material chosen for the experiments is presented in Table 1. The characteristic impedance Z1 = 70.71 Ω, Z2 = Z5 = 61. 24 Ω, Z3 = Z4 = 122.47 Ω and the electrical length of each transmission line is seated at λ/4, with an operating frequency specified at 2 GHz. The values of the characteristic impedance, electrical wavelength, and operating frequency are crucial for determining the length and width required for the construction and specification of the physical properties for the fabrication of the WPD3OP, as illustrated in Fig. 8(a) and detailed in Table 2. In addition, a DGS with dimensions a = 2.6 mm, b = 5 mm, gl = 1 mm, and g = 0.5 mm, as presented in Fig. 5(b), can be constructed for the fabrication of the WPD3OP integrated with DGS, as illustrated in Fig. 8(a) and (b). The fabrication dimensions are 53 mm × 32 mm. The experiment results regarding frequency responses and impedance are obtained from the values of the S-parameters, as depicted in Fig. 8(c) and (d). The frequency responses are in good agreement with the theoretical values.

Figure 8. Experiment results of the Wilkinson power divider for three-way output ports (WPD3OP) without defected ground structure (DGS) and with DGS: a) Fabrication of the top, b) fabrication of the bottom, c) result of the WPD3OP, d) proposed result of WPD3OP integrated with DGS.

In this experiment, a comparison was made between the WPD3OP integrated with a DGS and one without a DGS. The results of a WPD3OP, presented in Fig 8(c), shows that the power output insertion losses for all ports, S21 = −4.68 dB, S31 = −4.53 dB, and S41 = −5.21 dB. The return loss values are S11 = −29.98 dB, dB, and S33 = −32.33 dB. Moreover, the isolation values are S23 = −33.41 dB, S43 = −33.51 dB, and S24 = −28.95 dB. In terms of the performance of the proposed WPD3OP integrated with DGS, the insertion losses at all output ports are better than that of the WPD3OP: S21 = −4.95 dB, S31 = −4.89 dB, and S41 = −4.98 dB. The return losses are S11 = −28.47 dB, dB, and S33 = −29.80 dB. The isolation between the output ports, S23 = −45.97 dB, S43 = −39.60 dB, and S24 = −28.68 dB, as illustrated in Fig. 8(d). There is a good agreement between the measurement results of the WPD3OP integrated DGS and the result from the EM simulation, demonstrating a significant improvement in the power output to each port. Moreover, the insertion losses of the output ports, S11 = 1. 21 GHz, = 2.06 GHz, and S33 = 0. 83 GHz; and the isolation for ports, S23 = 1. 29 GHz, S43 = 1. 32 GHz, and S24 = 1.2 GHz; provide improved bandwidth, as presented in Table 3.

Table 3 . Comparison of designs of Wilkinson power divider for three-way output ports without defected ground structure (DGS) and with DGS.

Wilkinson power divider for three-way output portsWilkinson power divider for three-way output ports integrated with DGS
Return loss [dB]S11S22, S44S33Magnitude [dB]Return loss [dB]S11S22, S44S33Magnitude [dB]
-29.98-23.32-32.33-28.47-24.09-29.80
Insertion loss [dB]S21S31S43Insertion loss [dB]S21S31S43
-4.68-4.53-5.21-4.95-4.89-4.98
Isolation [dB]S23S43S24Isolation [dB]S23S43S24
-33.41-33.51-28.95-45.97-39.60-28.68
Return loss [-20dB]S11S22, S44S33Bandwidth [GHz]Return loss [-20dB]S11S22, S44S33Bandwidth [GHz]
0.971.970.811.212.060.83
Isolation [-20dB]S23S43S24Isolation [-20dB]S23S43S24
1.101.131.181.291.321.2

IV. CONCLUSION

The three-way WPD divides an input signal into two asymmetric output signals at a specified power ratio, thereby providing three output ports. Its performance includes various parameters such as insertion loss, return loss, isolation, and output power characteristics. When considering the frequency response, the WPD3OP exhibits improved return losses S11, S22, S33, and S44, and better isolation of S23, S43, and S24 compared to the other configurations. However, it is noteworthy that the insertion losses S21 = S31 = S41 and output power characteristics remain consistent across the different power divider models.

In this work, an integrated DGS was incorporated into the WPD3OP, and the outcome was impressive. The bandwidth was greater than that in the previous design, particularly in isolation for S23, S43, and S24. Meanwhile, the results of the insertion loss, S21 = S31 = S41 showed better power output at each port. These characteristics indicated that a welldesigned power-divider circuit could be highly effective in practical applications. With improved return loss, superior isolation, consistent insertion loss, and reliable output power characteristics, this three-way WPD demonstrated its suitability for various scenarios in which precise and efficient signal splitting is crucial. In addition, the circuit simulation verified using the measurement results indicated that the proposed design of the WPD3OP integrated with a DGS considered the improved magnitude and wide bandwidth of isolation between output ports S23, S43, and S24, which crucially reduced the interference. Enhanced isolation prevented unwanted interference between the output ports, ensuring that signals at one port did not adversely affect or distort the signals at other ports. This was particularly important in RF and microwave systems, which multiple signals coexisted. This ensured that each output port receives an equal or predetermined power level from the original signal.

ACKNOWLEDGMENT

This work was supported by the Technology Innovation Program (20016657, 5G RF Component For Global Communication Service Provider) funded by the Ministry of Trade, Industry & Energy (MOTIE, Republic of Korea), the Ministry of Science and ICT (MSIT), Republic of Korea, under the ICT Challenge and Advanced Network of HRD (ICAN) program (IITP-2024-2020-0-01832) supervised by the Institute of Information & Communications Technology Planning & Evaluation (IITP) the and Soonchunhyang University Research Fund.

Fig 1.

Figure 1.Proposed design of the Wilkinson power divider for three-way output ports, integrated with a DGS. The substrate εr = 0.762 mm and thickness = 0.035 mm.
Journal of Information and Communication Convergence Engineering 2024; 22: 14-22https://doi.org/10.56977/jicce.2024.22.1.14

Fig 2.

Figure 2.Schematic of the designed Wilkinson power divider for three-way output ports.
Journal of Information and Communication Convergence Engineering 2024; 22: 14-22https://doi.org/10.56977/jicce.2024.22.1.14

Fig 3.

Figure 3.Schematic bisections of the Wilkinson power divider for three-way output ports: a) even-mode analysis of Part I, b) odd-mode analysis of Part I, c) evenmode analysis of Part II, d) odd-mode analysis of Part II.
Journal of Information and Communication Convergence Engineering 2024; 22: 14-22https://doi.org/10.56977/jicce.2024.22.1.14

Fig 4.

Figure 4.Excitation of the equivalent circuit of the DGS section.
Journal of Information and Communication Convergence Engineering 2024; 22: 14-22https://doi.org/10.56977/jicce.2024.22.1.14

Fig 5.

Figure 5.Design of the defected ground structure (DGS) section with impedances of Z3 and Z4: a) top view, b) bottom view, and c) the comparison results of simulated DGS dimensions and equivalent-circuit RLC.
Journal of Information and Communication Convergence Engineering 2024; 22: 14-22https://doi.org/10.56977/jicce.2024.22.1.14

Fig 6.

Figure 6.Flow of the proposed design.
Journal of Information and Communication Convergence Engineering 2024; 22: 14-22https://doi.org/10.56977/jicce.2024.22.1.14

Fig 7.

Figure 7.EM simulation results: a) Wilkinson power divider (WPD) for three-way output ports, b) the proposed WPD for three-way output ports integrated with defected ground structure.
Journal of Information and Communication Convergence Engineering 2024; 22: 14-22https://doi.org/10.56977/jicce.2024.22.1.14

Fig 8.

Figure 8.Experiment results of the Wilkinson power divider for three-way output ports (WPD3OP) without defected ground structure (DGS) and with DGS: a) Fabrication of the top, b) fabrication of the bottom, c) result of the WPD3OP, d) proposed result of WPD3OP integrated with DGS.
Journal of Information and Communication Convergence Engineering 2024; 22: 14-22https://doi.org/10.56977/jicce.2024.22.1.14

Table 1 . Characteristics of material employed in the design.

SubstrateThicknessεrDielectric loss
Taconic0.762 mm2.970.0012

Table 2 . Calculation of the parameters of the Wilkinson power divider for three-way output ports without defected ground structure.

Impedance Z (Ω)Electrical Length (θ)Physical Length (mm)Physical Width (mm)
Z0 = 5045°L50 = 12.13W50 = 1.88
Z1 = 70.7190°L1 = 24.83W1 = 1.03
Z2 = 61.2490°L2 = 24.58W2 = 1.34
Z3 = 122.4790°L3 = 25.82W3 = 0.26
Z4 = 122.4790°L4 = 25.82W4 = 0.26
Z5 = 61.2490°L5 = 24.58W5 = 1.34

Table 3 . Comparison of designs of Wilkinson power divider for three-way output ports without defected ground structure (DGS) and with DGS.

Wilkinson power divider for three-way output portsWilkinson power divider for three-way output ports integrated with DGS
Return loss [dB]S11S22, S44S33Magnitude [dB]Return loss [dB]S11S22, S44S33Magnitude [dB]
-29.98-23.32-32.33-28.47-24.09-29.80
Insertion loss [dB]S21S31S43Insertion loss [dB]S21S31S43
-4.68-4.53-5.21-4.95-4.89-4.98
Isolation [dB]S23S43S24Isolation [dB]S23S43S24
-33.41-33.51-28.95-45.97-39.60-28.68
Return loss [-20dB]S11S22, S44S33Bandwidth [GHz]Return loss [-20dB]S11S22, S44S33Bandwidth [GHz]
0.971.970.811.212.060.83
Isolation [-20dB]S23S43S24Isolation [-20dB]S23S43S24
1.101.131.181.291.321.2

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